1. Field of the Invention
The present invention relates to an improved high speed NOR circuit and the semiconductor integrated circuit structure thereof which lends itself to high density integration.
2. Description of the Prior Art
Many integrated semiconductor circuits for performing the NOR (NAND) binary logical function are known to the art. A number of texts have been published which disclose the circuit design and operation of binary logical circuits. For example, two such texts are (1) "Designing with TTL Integrated Circuits" by Texas Instruments Incorporated Components Group, Copyright 1971, McGraw-Hill Kogakusha Ltd., and (2) "Digital Integrated Electronics" by Herbert Taul and Donald Schilling, Copyright 1977, McGraw-Hill, Inc.
Set forth below are a number of U.S. patents and publications which disclose the fabrication and structure of binary logical circuits.
U.S. Pat. No. 3,736,477 entitled "Monolithic Semiconductor Circuit for a Logic Circuit Concept of High Packing Density" granted May 29, 1973 to Horst H. Berger et al. PA1 U.S. Pat. No. 3,816,758 entitled "Digital Logic Circuit" granted June 11, 1974 to Horst H. Berger et al. PA1 U.S. Pat. No. 3,956,641 entitled "Complementary Transistor Circuit for Carrying Out Boolean Functions" granted May 11, 1976 to Horst H. Berger et al. PA1 U.S. Pat. No. 4,069,494 entitled "Inverter Circuit Arrangements" granted Jan. 17, 1978 to David L. Grundy. PA1 U.S. Pat. No. 4,158,783 entitled "Current Hogging Injection Logic with Self-Aligned Output Transistors" granted June 19, 1979 to Horst H. Berger et al. PA1 "High Density NOR Block" by J. Bode and F. A. Montegari, Vol. 19, No. 11, April 1977, pages 4186-7. PA1 "Totem-Pole Logic" by R. T. Farley et al, Vol. 20, No. 9, Feb. 1978, pages 3466-7. PA1 "Concept for High Performance Fiber-Optic Driver" by R. E. Da Costa et al, Vol. 22, No. 12, May 1980, pages 5363-4. PA1 "NPN-PNP Inverter with Hysteresis" by F. A. Montegari, Vol. 23, No. 1, June 1980, pages 178-9. "Complementary Schottky Current Switch" by R. J. Blumberg et al, Vol. 24, No. 1B, June 1981, pages 463-5. PA1 "Injection Current Switch Logic" by H. H. Berger et al, Vol. 24, No. 6, November 1981, pages 3089-90. PA1 "Complementary Current Switch" by F. A. Montegari, Vol. 25, No. 3B, August 1982, pages 1478-9. PA1 A high speed low power logic circuit, said logic circuit having at least first and second input terminals and an output terminal, said logic circuit accepting first and second binary inputs, respectively, at said first and second input terminals and providing a binary output at said output terminal, said binary output being a predetermined logical function of said first and second binary inputs, said logic circuit comprising: a first transistor, a second transistor and a first resistor serially connected between a first source of potential and a second source of potential, said first transistor being of first conductivity type and having an emitter, base and collector, said second transistor being of a second conductivity type opposite to said first conductivity type and having an emitter base and collector; a capacitor connected in parallel with said first resistor; a second resistor connected between said base of said second transistor and said second source of potential; first connections means passively connecting in common said base of said first transistor and said base of said second transistor; first and second diodes, said first and second diodes being respectively connected between one of said first and second input terminals and said first connection means; and second connection means connecting said output terminal to said collector of said first transistor and said collector of said second transistor. PA1 A high speed low power logic circuit as recited in the preceding paragraph, said logic circuit performing the INVERT Logic function and having only a single input terminal and associated diode.